The present invention is directed to a digital signal processing apparatus. In particular, the present invention is directed to a digital signal processing apparatus which is amenable to user-defined program routines.
Prior art general purpose digital signal processing apparatuses typically comprise a program memory in a read-only memory (ROM) structure, a program counter which drives the program memory, a data memory in a random-access memory (RAM) structure for storing partial results, a coefficient memory in ROM structure for storing prestored constants, and a computational section generally consisting of a programmed logic array for establishing predetermined logical relationships, an arithmetic logic unit (ALU), an accumulator, a multiplier, and a shifter.
There are certain problems associated with such prior art general purpose digital signal processing apparatuses. In particular, programs resident in the program memory (ROM) in such apparatuses are designed for particular applications or targeted to run a particular machine or function. Any changes to the resident program of such prior art digital signal processing apparatuses can only be made by a total rewrite of the program stored in ROM in machine language.
Generally, the steps involved in designing a digital signal processing apparatus from the outset include a simulation or modelling of the particular program to be implemented by the apparatus; such modelling is conducted using a high-level computing language. That is, a computing language which employs commands which are translated by a program into machine-level language, which machine-level language is acted upon by a computing apparatus. Machine-level language generally has little resemblance to high-level language. The expression of the program in machine-level language is necessarily tedious and, therefore, affords increased opportunities for error during the translation to machine language from high-level language. Such increased opportunities for error give rise to system "bugs"; valuable time is necessarily expended in ascertaining the source of the "bugs" and drafting new machine language code to fix the problems discovered.
Once the correct machine language has been determined, an outside independent source is usually employed to consult, assist in design, assist in manufacturing, and test the program setup in anticipation of manufacturing the required apparatus. Such apparata are usually implemented in a plurality of masks for combining into an integrated circuit in a wafer form for mass production. Significant front-end costs are thus usually incurred before one begins to realize an income stream from sale of the apparatus. If system or program bugs are not discovered until after the masking process is complete, then the chip or wafer must be rejected and the process returns to the design stage or the translation (to machine-level language) stage in order that "debugging" may continue and the processing may be repeated through the manufacturing stages. Chips are almost never reworkable and must be discarded, resulting in sometimes significant non-recoverable engineering and manufacturing costs. If it is decided to change the program solution and, consequently, change the machine coding implementing the programs, the same cost impact is encountered as would be encountered in the case of a late-discovered mistake. Thus, such prior art digital signal processing apparata discourage innovations which could be implemented but which require even minor program changes.
Cost is not the only significant factor in considering the problems with designing or reprogramming prior art digital signal processing apparata. The time involved in fabricating a newly-designed digital signal processing apparatus is generally on the order of about three months. Reprogramming and generating new masks to correct a problem or to implement an improvement can take around six weeks to complete. Such time delays can result in significant opportunity costs in lost sales in a volatile competitive market such as today's electronic systems market.
Some efforts have been made to render a digital signal processing capability more amenable to real-world needs of timely and forgiving manufacturing processes. For example, EPROM (erasable programmable read-only memory) devices have been introduced. Such EPROM devices have utility as prototype ROM devices and are principally used for testing machine-level language being developed for a digital signal processing apparatus prior to sending the machine code for implementation in masks in an integral device. An advantage of digital signal processing apparata such as the apparatus of the present invention is their small size, their speed of operation, and their low cost. EPROM devices are too large, too slow, and too expensive for widespread use with digital signal processing apparata in applications of the type contemplated by the present invention.
Therefore, there is a need for a digital signal processing apparatus which is amenable to cost-effective, timely changes in the programming instructions to be implemented by the apparatus. It is desirable that such an improved digital signal processing apparatus employ an on-board instruction ROM in order to realize the benefits of increased speed of operation available to such integral devices.